Elon Musk Says Chip Process Names Should Be Based on Atoms, Not Marketing Labels

Elon Musk has criticized IBM’s use of the 0.7 nanometer label for its latest chip manufacturing technology, arguing that modern process node names no longer clearly describe the physical size of features on a chip.

IBM recently introduced its 0.7 nanometer manufacturing research, which uses nanosheet technology, vertical transistor stacking, and wafer bonding to increase chip density. The company has described the technology as part of its progress toward more advanced semiconductor designs, but it also acknowledged that the 0.7 nanometer name does not directly represent the width of a specific physical feature.

That detail has become increasingly common in the chip industry. Terms such as 7nm, 5nm, 3nm, and now sub 1nm are no longer simple measurements of transistor dimensions. Instead, they are generation names used to describe a collection of manufacturing improvements, including density, power efficiency, transistor design, and performance.

Musk believes the industry should adopt a clearer naming system based on the number of atoms across the smallest feature.

Why Modern Chip Process Names Can Be Confusing

In earlier generations of semiconductor manufacturing, process node labels were more closely connected to physical measurements. A named node could refer to a real dimension in the transistor or metal wiring.

That is no longer the case.

As manufacturing became more complex, companies began using node labels as broader branding terms. A 3nm process from one company may not have the same transistor density, power characteristics, or physical dimensions as a 3nm process from another company.

IBM has been direct about this issue. Its 0.7 nanometer, or 7 angstrom, label describes a new generation of technology rather than the width of the chip’s smallest printed feature.

Musk’s argument is that naming nodes by the number of atoms across the smallest feature would be more accurate and easier for people to understand.

IBM’s 0.7 Nanometer Technology Focuses on Stacked Transistors

IBM’s latest development builds on nanosheet transistor technology and uses nanostacking to place transistors vertically. Stacking can increase density without relying only on shrinking components across a flat surface.

The company also highlighted wafer bonding as an important part of the process. This technique allows different layers of a chip to be joined together, creating more room for components and helping improve performance per area.

The goal is not simply to make a number smaller. Chip companies are trying to pack more transistors into the same space while improving energy efficiency and reducing the amount of power needed for demanding workloads.

This is particularly important for AI data centers, smartphones, laptops, cloud services, and high performance computing systems. Modern chips must deliver more performance while controlling heat and energy use.

Intel, TSMC, Samsung, and IBM All Use Different Naming Approaches

The problem is not limited to IBM. Intel changed its process naming system in 2021, renaming its 10nm process as Intel 7 and its older 7nm generation as Intel 4.

TSMC and Samsung also use node labels that are not directly comparable with one another. A smaller process name does not automatically mean a chip will have smaller transistors, better performance, or lower power use than a rival product.

For buyers, the label alone is no longer enough to judge a processor. Real world performance, energy efficiency, transistor density, chip architecture, packaging, and memory design often matter more.

Musk’s proposal may be difficult to adopt across the industry, but it highlights a real problem. Process node names have become marketing shorthand rather than precise scientific measurements.

As companies move toward angstrom era manufacturing, clearer explanations will become increasingly important. A smaller number may sound impressive, but the technology behind it matters far more than the label on the roadmap.