Arm Neoverse CSS N4 Brings Up to 128 Cores to Semi Custom Data Center Chips

Arm has introduced its next generation Neoverse CSS N4 platform for data center chip designers, offering up to 128 CPU cores on a single die and support for TSMC's N3P process.

The platform, also known by the codename Ranger, is part of Arm's Compute Subsystem program. CSS gives companies a validated base that they can adapt for their own processors, including changes to core count, cache, memory, connectivity and I/O.

The announcement is aimed at companies building cloud processors, infrastructure accelerators and other custom silicon rather than buyers looking for a finished CPU.

Neoverse CSS N4 doubles the maximum core count

The biggest change is scale. Neoverse CSS N4 supports configurations ranging from eight to 128 Neoverse N4 cores per die, compared with a maximum of 64 cores on the previous CSS N2 platform.

Arm says the cores can run at frequencies up to 3.8 GHz, although it has not provided clock speeds for every possible core configuration. Larger multi chiplet and multi socket systems are also supported.

Specification	Neoverse CSS N4
Process	TSMC N3P
CPU cores	8 to 128 Neoverse N4 cores per die
Maximum clock	Up to 3.8 GHz
L2 cache	Up to 2 MB per core
L3 cache	Up to 256 MB per die
Memory	DDR5 or LPDDR6
PCIe support	Up to 128 lanes of PCIe 7 or PCIe 6
CXL	CXL 4.0
Chiplet connectivity	UCIe support
Scaling	Multi chiplet and multi socket

Each core can have up to 2 MB of L2 cache, while total L3 cache can reach 256 MB per die. Arm also lists 64 KB of L1 instruction cache and 64 KB of L1 data cache per core.

Memory support moves forward with DDR5 and LPDDR6, while connectivity can extend to 128 lanes of PCIe 7 or PCIe 6 together with CXL 4.0.

Arm claims major performance gains over earlier platforms

For a configuration with 128 cores running at 3 GHz and 2 MB of L2 cache per core, Arm claims twice the socket performance of Neoverse N3.

The company also claims 1.25 times better performance per watt and 1.75 times the memory bandwidth.

These figures are Arm's own comparisons, and independent performance results are not yet available.

The N series remains focused primarily on performance efficiency rather than maximum single socket performance. Arm's V series is positioned higher for workloads where peak performance is the priority.

Customers can build their own versions

CSS is not a conventional processor launch. Companies using the platform can adapt the design to fit different workloads instead of taking a fixed CPU configuration.

That flexibility can include different core counts, cache sizes, I/O layouts, memory setups and chiplet designs. Arm says the platform can also use UCIe for chip to chip connections.

The company has not yet named customers that will use Neoverse CSS N4. Because these designs still need to be developed into finished silicon, systems based on N4 are unlikely to appear immediately.

Arm expands deployments of its own AGI processor

Arm also announced more customers for its separate AGI data center CPU, including Oracle and ByteDance. Previously disclosed deployments include Meta, Lenovo, SAP, OpenAI and Cloudflare.

AGI uses Neoverse V3 cores rather than N4. It is a dual die processor with up to 136 cores, up to 272 MB of L3 cache and clock speeds reaching 3.7 GHz.

The processor supports up to 6 TB of memory per chip and memory speeds up to DDR5 8800. Arm has promoted AGI as capable of delivering more than twice the performance per rack compared with recent x86 systems, although that figure is based on internal estimates rather than independent benchmark testing.

Neoverse CSS N4 shows Arm continuing to expand the building blocks available to companies designing custom data center processors, with the new platform doubling the maximum per die core count while adding newer memory, cache and connectivity options.