AMD’s demand for TSMC’s advanced CoWoS packaging is expected to rise sharply in 2027, driven by growing shipments of EPYC Venice processors and next generation Instinct accelerators.
According to estimates cited in the report, AMD could require around 530,000 CoWoS wafers in 2027, up from approximately 130,000 wafers in 2026. That would represent growth of about 308% in one year.
The increase would also lift AMD’s estimated share of total CoWoS demand from around 9% in 2026 to roughly 20% in 2027.
NVIDIA is still expected to remain the largest individual customer, but its share of total CoWoS allocation could decline as overall industry demand grows faster.
AMD CoWoS demand could rise more than fourfold
| Metric | 2026 estimate | 2027 estimate |
|---|---|---|
| AMD CoWoS demand | 130,000 wafers | 530,000 wafers |
| AMD share of total CoWoS market | 9% | 20% |
| NVIDIA CoWoS share | 53.4% | 45.6% |
| NVIDIA CoWoS demand | Not stated | 1.2 million wafers |
| Total industry demand | About 1.4 million wafers | 2.7 million wafers |
| EPYC Venice CoWoS demand | 50,000 wafers | 270,000 wafers |
The report suggests that EPYC Venice will be one of the biggest contributors to AMD’s packaging requirements.
Venice related demand is expected to rise from around 50,000 CoWoS wafers in 2026 to approximately 270,000 in 2027.
That reflects the growing role of server CPUs in AI infrastructure, particularly as agentic AI workloads place greater demand on general compute, memory movement and orchestration around accelerators.
NVIDIA remains larger despite lower market share
NVIDIA’s percentage of total CoWoS demand is expected to fall, but that does not mean its absolute demand is shrinking.
The company could require around 1.2 million CoWoS wafers in 2027, representing an estimated annual increase of 57%.
The reason its market share still falls is that total CoWoS demand is forecast to expand even faster.
Industry wide demand is expected to reach approximately 2.7 million wafers in 2027, up around 93% from the previous year.
As a result, NVIDIA’s estimated share could decline from 53.4% to 45.6% even while the actual number of wafers allocated to its products continues to rise significantly.
EPYC Venice shipments could surpass NVIDIA Vera CPU volumes
The same estimates point to strong server CPU shipments from both AMD and NVIDIA.
AMD’s 2nm EPYC Venice processors are projected to reach around 6.75 million units in 2027, compared with approximately 1.25 million units in 2026.
NVIDIA’s Vera CPU shipments are estimated at around 5 million units for 2027.
These figures are analyst projections rather than confirmed company guidance, so actual shipment volumes could differ.
Still, they indicate that CPUs are expected to remain increasingly important inside AI systems rather than serving only as supporting components around GPUs.
MI455X design also increases packaging consumption
AMD’s rising CoWoS requirements are not only about unit shipments.
The report notes that products such as the MI455X consume more advanced packaging capacity because of their modular design.
Unlike a simpler monolithic architecture, a multi chip design requires more complex integration across several pieces of silicon.
That can increase the amount of CoWoS capacity needed per accelerator.
AMD’s next generation Instinct products therefore contribute to packaging demand both through higher shipment volumes and through the physical complexity of the packages themselves.
TSMC faces broader pressure on advanced packaging
The larger trend is that CoWoS capacity is becoming increasingly important across the AI hardware industry.
AMD is expected to take a much larger share in 2027, but NVIDIA still remains the dominant individual customer in absolute terms.
If the projections are accurate, TSMC will need to expand packaging output aggressively to support both companies and the wider market.
For AMD, the key change is scale. Its CoWoS demand could move from a relatively modest share in 2026 to roughly one fifth of the total market in 2027, supported by EPYC Venice, MI400 generation accelerators and the broader growth of agentic AI infrastructure.
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