Intel’s EMIB T gains more attention as Google’s next TPU supply chain expands

Intel’s EMIB T packaging technology is reportedly gaining more traction in Google’s next generation AI chip supply chain, as pressure on TSMC’s CoWoS capacity continues to reshape how major companies package advanced processors. The latest supply chain reports suggest that Taiwan’s Powerchip Semiconductor and AP Memory Technology may now be connected to the effort around Google’s future TPU chips.

The report is important because AI chip packaging has become one of the industry’s biggest bottlenecks. Modern AI accelerators are not built around a single simple chip. They often combine compute dies, memory, and other components inside one advanced package. The package has to move data quickly, support high bandwidth memory, and remain practical enough to manufacture at scale.

TSMC’s CoWoS has been the dominant packaging route for many high end AI products, especially as Nvidia and other companies push demand for advanced accelerators. But that demand has also strained supply. When packaging capacity becomes tight, companies naturally begin looking for alternatives that can reduce cost, improve availability, or offer more supply flexibility.

Intel’s EMIB, short for Embedded Multi Die Interconnect Bridge, is one of those alternatives. Instead of using a large silicon interposer like CoWoS, EMIB uses smaller bridge connections between different parts of a chip package. Intel argues that this approach can reduce complexity and cost while still delivering strong performance and scalability.

The new report claims AP Memory’s silicon capacitor products are playing an important role in MediaTek’s design work for Google’s AI chips. Powerchip may also become involved as demand for EMIB T related production grows. The report suggests capacitor production could become a constraint, with SiCap output expected to reach 10,000 units by the end of 2027.

That detail matters because advanced packaging is not only about the headline technology. It also depends on smaller parts of the supply chain, including capacitors, substrates, memory integration, and manufacturing yield. If any one of those pieces becomes limited, the whole production plan can slow down.

Google’s role makes the story more interesting. The company already builds its own TPU chips for AI workloads, and future versions are expected to remain important as cloud companies try to reduce dependence on outside GPU suppliers. If Google uses Intel’s packaging technology for a future TPU, it would give Intel a stronger position in the AI hardware supply chain.

At the same time, nothing is guaranteed. Reports suggest final orders may depend on Intel’s production yield. Yield is critical because better yield means more usable chips from each batch, which lowers cost and improves supply predictability. For a company like Google, that can matter as much as raw performance.

There is also a possible alternative path. Google is reportedly interested in sending chip designs directly to TSMC to save costs, instead of working only through MediaTek. That means Intel’s opportunity is real, but it may still depend on pricing, production reliability, and whether EMIB T can scale well enough for Google’s needs.

The wider trend is clear. AI chip competition is no longer only about GPUs or custom accelerators. Packaging is now a major battleground. TSMC’s CoWoS remains a powerful standard, but Intel is trying to prove that EMIB T can give customers another route when CoWoS capacity is tight or expensive.

For Intel, these reports are encouraging. The company has been trying to rebuild trust in its foundry and advanced packaging business, and a stronger connection to Google’s TPU roadmap would be a valuable signal. If Powerchip and AP Memory are indeed joining the EMIB T related supply chain, it suggests the ecosystem around Intel’s packaging technology is becoming broader.

The next major test will be execution. Intel needs to show that EMIB T can deliver strong yields, enough capacity, competitive cost, and performance that satisfies AI chip buyers. If it can, the company could gain a more meaningful role in the AI boom. If it cannot, customers may continue to rely heavily on TSMC despite the pressure on CoWoS supply.

For now, the report shows that Intel’s EMIB T is becoming harder to ignore. As AI demand keeps straining advanced packaging capacity, Google and its partners appear to be exploring more ways to build future TPUs, and Intel may finally have a chance to turn its packaging technology into a serious AI supply chain advantage.