TSMC Reportedly Plans to Double CoWoS Capacity by 2028 as AI Packaging Demand Keeps Rising

TSMC is reportedly preparing a major expansion of its advanced CoWoS packaging capacity as demand for AI chips continues to put pressure on the semiconductor supply chain.

The company is expected to increase CoWoS output from about 130,000 12 inch wafer equivalents per month by the end of 2026 to roughly 260,000 per month by the end of 2028. If those estimates are accurate, TSMC would effectively double its capacity in two years.

CoWoS has become an important part of modern AI hardware because it allows high performance processors and high bandwidth memory to be integrated closely together. The technology is widely used for advanced AI accelerators, including products from major chip designers.

TSMC expansion could ease one of the AI supply chain bottlenecks

The planned increase would focus partly on TSMC's AP7 operations in Taiwan and its manufacturing campus in Arizona.

At present, advanced chips produced in Arizona may still need to be transported to Taiwan for packaging because much of TSMC's advanced packaging infrastructure is concentrated there. Additional capacity in the United States could gradually reduce that dependency.

The expansion matters because advanced packaging has become one of the limiting factors in AI chip production. Even when enough logic dies and memory components are available, manufacturers still need sufficient packaging capacity to combine those parts into a finished accelerator.

CoWoS uses an interposer with through silicon vias to connect logic chips and memory at high speed. This approach provides the bandwidth and low latency needed by large AI processors.

Intel could gain more packaging business through EMIB T

TSMC's capacity shortage is also creating opportunities for competing packaging technologies.

Intel's EMIB T is one of the alternatives attracting attention. Instead of using a large interposer in the same way as CoWoS, EMIB places small silicon bridges inside the substrate to connect different chiplets.

Industry estimates suggest Intel could reach the equivalent of 15,000 to 20,000 12 inch wafers per month in 2027. That figure could rise to about 40,000 to 45,000 wafers per month in 2028.

EMIB T may be particularly suitable for custom AI processors where companies want to combine several types of silicon in one package. Custom accelerators designed by large cloud providers are one potential market for the technology.

Other packaging suppliers are also benefiting from the shortage. Companies including Amkor, UMC and ASE are seeing stronger interest as customers look for alternatives to TSMC's limited capacity.

The broader trend shows that advanced packaging is becoming as important as leading edge chip manufacturing in the AI market. TSMC remains in a strong position, but demand is growing quickly enough to support additional suppliers and competing technologies.

If TSMC reaches the reported 260,000 wafer monthly target in 2028, it would significantly increase the amount of AI hardware that can move through the packaging stage. Even with that expansion, continued growth in AI infrastructure could keep capacity tight across the industry for several years.