JPMorgan is pushing back on claims that Intel has secured a major manufacturing order for Google’s custom AI chips, arguing that the reported deal may be far less significant than it first appeared. The bank says the situation looks more like a packaging partnership than a full chipmaking win for Intel Foundry.
The debate started after a report claimed Google had placed an order with Intel to manufacture three million tensor processing units, or TPUs. That claim drew attention because it suggested Intel could be gaining a major customer at a time when AI chip demand remains extremely high and TSMC capacity is under pressure.
But JPMorgan is taking a more cautious view. The bank described the report as a “storm in a teacup” and said there is little evidence that Google is shifting TPU fabrication to Intel. Instead, JPMorgan believes the compute and input output dies for these chips are still being manufactured by TSMC, with Intel’s role likely limited to advanced packaging.
That distinction matters. Fabricating a chip means producing the silicon itself. Packaging means assembling different chip components into a final product. A packaging win can still be important, especially in AI hardware, but it is not the same as Intel replacing TSMC as the main manufacturer.
Intel may still benefit from Google’s AI chip supply chain
Intel’s EMIB T packaging technology has been part of recent supply chain discussions because it offers an alternative to TSMC’s CoWoS packaging. CoWoS demand has been extremely tight because high end AI accelerators rely on advanced packaging to connect compute dies, memory, and other chip components.
Intel’s EMIB T is seen as a lower cost option that could work well for custom AI chips with lower power requirements. That makes it relevant to companies like Google, which designs its own AI accelerators instead of relying entirely on Nvidia GPUs.
| Claim or view | What it means |
|---|---|
| Reported Intel order | Google was said to have ordered three million TPUs from Intel |
| JPMorgan view | The chips are likely still fabricated by TSMC |
| Intel’s likely role | Advanced packaging through EMIB T |
| TSMC process mentioned | 2nm compute die and 3nm input output die |
| Citi view | The deal could include Intel foundry, design services, and packaging |
| Main uncertainty | Whether Intel is fabricating chips or only packaging them |
Even if JPMorgan is correct, Intel could still gain from the deal. AI packaging capacity is a major bottleneck, and customers are looking for alternatives to avoid relying too heavily on TSMC’s CoWoS supply. If Intel can win more packaging work, it could strengthen its foundry ecosystem and prove that its advanced packaging technologies have real commercial value.
Citi sees more room for Intel’s involvement
Citi offered a more open interpretation. While many investors reportedly believe the story is mostly about packaging, Citi noted that the arrangement could also involve Intel’s foundry and design services, along with EMIB T.
That does not mean Intel has taken over TPU fabrication from TSMC. It means the partnership may be broader than a simple packaging order. Intel could be involved in multiple parts of the chip development and assembly process without being the primary wafer manufacturer.

This is where the story becomes complicated. Modern AI chips are no longer single pieces of silicon made in one step. They often combine multiple dies, different process nodes, high bandwidth memory, and advanced interconnects. A company can contribute meaningfully to the final chip even if it does not fabricate every part.
For Intel, that nuance is important. The company wants its foundry business to compete with TSMC, but winning major fabrication orders from hyperscalers is difficult. Packaging could become a more realistic near term entry point.
The market wants proof before calling it a foundry win
The reason JPMorgan’s response matters is that Intel investors are eager for signs that the foundry strategy is working. A three million chip order from Google would sound like a major validation of Intel’s manufacturing roadmap. If the deal is only packaging, the story is still positive, but less dramatic.
TSMC remains the dominant advanced chip manufacturer, and Google has already relied on it for its custom AI silicon. Moving a critical TPU design to Intel fabrication would be a major shift and would likely require strong evidence. JPMorgan’s point is that the current information does not prove such a shift has happened.
The more likely scenario is that Google is diversifying parts of its supply chain. With AI demand rising and packaging capacity tight, using Intel as a packaging partner could give Google more flexibility while keeping advanced die production at TSMC.
Intel’s AI opportunity may come through packaging first
The disagreement does not erase Intel’s opportunity. It simply narrows the claim. Intel may not have won full TPU manufacturing from Google, but it could still become a useful partner in the AI chip supply chain.
Advanced packaging is becoming just as strategically important as chip fabrication for AI hardware. Without enough packaging capacity, even leading edge wafers cannot become finished accelerators fast enough. That gives Intel a path to relevance if EMIB T proves cost effective and scalable.
The key question is whether Intel can turn packaging relationships into deeper foundry commitments later. If companies begin using Intel for assembly and gradually trust its process technology, the foundry business could gain momentum. But for now, JPMorgan is warning that the reported Google TPU deal should not be treated as proof of a major fabrication win.
Intel may still have a role in Google’s future AI chips, but based on the analyst response, the story appears to be more about packaging capacity than a full manufacturing handoff from TSMC.



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