NVIDIA’s future Rosa CPUs are reportedly being planned around TSMC’s most advanced manufacturing technologies, including 2nm and possibly A16 with backside power delivery. The chips are expected to arrive near the end of the decade as part of NVIDIA’s next stage of AI data center hardware.
The report says NVIDIA is considering TSMC’s 2nm family for Rosa, but A16 appears to be especially interesting because of its Super Power Rail technology. This uses backside power delivery, which changes how power and signals are routed inside the chip. In simple terms, signal and clock routing stay on the front side of the chip, while power delivery moves to the back side. That can improve efficiency, performance, and layout density.
For AI CPUs, those gains matter. NVIDIA’s data center platforms are becoming more dependent on fast CPU performance, efficient memory access, and tight integration with GPUs. A process technology that can improve power delivery without requiring a larger footprint would fit the direction NVIDIA is taking with its Grace, Vera, and future Rosa CPU roadmap.
A16 could help NVIDIA raise CPU performance without increasing chip footprint
TSMC’s A16 process is expected to offer clear gains over N2P. The reference material points to an 8 to 10 percent speed improvement, 15 to 20 percent lower power at the same speed, and around 10 percent better chip density. Those are meaningful gains for a CPU designed to run at scale in AI servers, where power efficiency and physical space are major limits.
NVIDIA’s Rosa CPU is expected to use a new custom core architecture called Rigel, based on Arm v9.2. It will follow Vera, which uses NVIDIA’s custom Olympus cores. Vera is already positioned as a major step beyond Grace, with higher per core performance and stronger memory bandwidth. Rosa is expected to push further, with a focus on stronger single threaded performance at scale.
| NVIDIA CPU | Core architecture | Expected role |
|---|---|---|
| Grace | Arm Neoverse V2 | Current data center CPU platform |
| Vera | NVIDIA Olympus, Arm v9.2 | Higher throughput and stronger AI system integration |
| Rosa | NVIDIA Rigel, Arm v9.2 | Future CPU focused on stronger single thread performance |
| Expected Rosa process | TSMC 2nm or A16 | Advanced node for future AI data centers |
| Expected Rosa timing | Around 2029 | Data center rollout before later PC specific variants |
The use of A16 would also affect the semiconductor supply chain. Backside power delivery requires more advanced manufacturing steps, including more demand for chemical mechanical polishing processes and related consumables. Taiwanese suppliers connected to those production steps could benefit if NVIDIA selects A16 for Rosa.
The report also places Rosa within NVIDIA’s broader AI roadmap. Grace has already shipped, Vera is tied to the upcoming Vera Rubin systems, and Rosa is expected to pair with future Feynman generation platforms. This shows NVIDIA is treating the CPU as a major part of its AI infrastructure, not only as a support chip for GPUs.
Rosa is expected to focus on maximum single threaded performance, which may be important for agentic AI workloads and complex control tasks where fast CPU response can matter. AI servers still rely on GPUs for heavy parallel computation, but CPUs remain important for orchestration, data movement, scheduling, and software workloads that do not map cleanly to accelerators.
For now, the process choice is still reported rather than confirmed. NVIDIA could use TSMC’s 2nm family, A16, or a combination of advanced technology options depending on timing, yield, cost, and platform needs. If A16 is selected, Rosa would become one of the clearest examples of backside power delivery moving into high performance AI compute.
The larger message is that NVIDIA is pushing deeper into custom CPU design. Rosa appears to be another step away from relying only on GPUs and toward building complete AI platforms where the CPU, GPU, memory, and interconnect are designed together.
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