Huawei is trying to present a new path forward for chip progress as US sanctions continue to block its access to the most advanced EUV lithography tools. The company’s recently discussed Tau scaling concept claims that chip performance can keep improving by looking beyond traditional transistor density. But semiconductor analyst Dr. Ian Cutress is not convinced that Huawei’s argument is being framed correctly.
Huawei’s position appears to be shaped by necessity. Without access to leading edge EUV and High NA EUV equipment, the company cannot easily follow the same path as TSMC, Intel, and Samsung. Those companies continue to push smaller process nodes by printing finer circuits and increasing transistor density. Huawei is instead arguing that the industry should look at broader system level progress, including packaging, stacking, and other design methods.
That idea is not useless. Modern chips already rely on more than transistor shrinking. Chiplets, advanced packaging, hybrid bonding, memory stacking, and interconnect improvements all matter. But Cutress argues that Huawei is not redefining the industry so much as shifting the focus. In his view, Moore’s Law has long been used as a proxy for chip progress, and Huawei’s Tau scaling does not replace it.
The main dispute is whether Huawei is comparing area density with stacked chip volume
The technical debate centers on how Huawei appears to discuss density. Traditional semiconductor density usually means transistors per unit area on a chip. Cutress says Huawei’s logic stacking argument is closer to counting gains through vertical space, where placing logic on top of logic can increase total transistor count within the same footprint.
He compared it to adding a second floor to a house. From an urban planning view, the same land now holds more rooms. From a construction view, the house itself did not become denser in the same way. His point is that Huawei may be using a different kind of measurement than the rest of the chip industry usually means when discussing node density.
| Topic | What is being debated |
|---|---|
| Huawei’s idea | Tau scaling focuses on broader system level gains |
| Analyst concern | Huawei may be comparing different density concepts |
| Key technology | Logic on logic stacking and hybrid bonding |
| Claimed breakthrough | Sub 2 micron hybrid bonding pitch |
| Main limitation | Moving lab level ideas into mass production |
Cutress also noted that the technologies Huawei is discussing are not entirely new. Hybrid bonding, chip stacking, and multi die interconnect methods have been researched for many years by major companies including Intel, AMD, and TSMC. Intel’s EMIB work dates back years, while AMD and TSMC have already used hybrid bonding in commercial products.
The hard part is not showing the concept once. It is building it at scale with high yield, stable costs, and reliable manufacturing. Cutress said research demonstrations and mass production are very different problems. A technology can work in a lab and still be difficult to produce millions of times in a factory.

Huawei’s most interesting claim appears to be logic on logic stacking with a very small bonding pitch, reportedly around 2 microns. If Huawei can manufacture that reliably, it would be a serious packaging achievement. But that is different from saying Tau scaling directly matches a 14 angstrom class process from TSMC or Intel.
There is also a cost and energy concern. Cutress pointed out that hybrid bonding can require much more energy per square centimeter than advanced EUV transistor production. Higher energy needs can slow production and make good yields harder to achieve, which matters in commercial chipmaking.
He also questioned the writing style of Huawei’s Tau scaling paper, saying parts of it appeared similar to AI written text. He did not present that as the central issue, but it added to his skepticism about how the message was being framed.
Huawei’s situation is unusual. Sanctions have pushed the company to explore paths that rely less on the most advanced lithography tools. That could lead to useful innovation in packaging and system design. But Cutress’ criticism is important because it separates a real engineering challenge from a marketing claim. Huawei may be pursuing promising chip stacking work, but claiming it changes Moore’s Law or matches the latest process nodes may be overstating what the technology proves today.



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