AMD has launched its EPYC 8005 Sorano server processor family, bringing Zen 5 cores to systems built for edge, telecom, vRAN, cloud storage, and other space constrained deployments. The new lineup scales from 8 cores to 84 cores and is designed for single socket servers that need strong I/O, memory support, and lower platform power.
The biggest change is that EPYC 8005 uses full Zen 5 cores instead of Zen 5c cores. That makes it different from the previous EPYC 8004 Siena family, which used Zen 4c cores. AMD is positioning Sorano as a compact server platform with better clocks, more cache, and a wider range of core counts.
AMD is aiming Sorano at compact servers that still need modern data center features
The flagship EPYC 8635P comes with 84 cores, 168 threads, 384MB of L3 cache, and a default TDP of 225W. The wider lineup starts at 8 cores and goes up from there, giving customers options for systems that need server class features without the cost or power draw of AMD’s larger EPYC 9005 Turin platform.

Sorano operates in a 70W to 225W TDP range, which makes it more suitable for deployments where power, space, and cooling are limited. AMD says the chips are meant for single socket systems such as cell tower installations, outdoor cabinets, storage systems, and quiet edge servers.
| Feature | AMD EPYC 8005 Sorano |
|---|---|
| Architecture | Zen 5 |
| Core range | 8 to 84 cores |
| Top model | EPYC 8635P |
| Flagship threads | 168 threads |
| L3 cache | Up to 384MB |
| TDP range | 70W to 225W |
| Platform focus | Edge, telecom, vRAN, and storage |
| Server type | Single socket systems |
AMD also claims a clear performance jump over its previous edge focused EPYC lineup. The company says the EPYC 8635P delivers 40 percent higher top stack integer performance and 9.5 percent better performance per watt than the older 64 core EPYC 8004 flagship. Against Intel’s 40 core Xeon 6716P B, AMD claims up to 91 percent higher integer performance while using 10W lower TDP.
This is related to AMD’s broader server roadmap, but it is different from the earlier EPYC Venice story. Venice targets next generation high performance data center and AI workloads on TSMC’s 2nm process. Sorano is focused on smaller, lower power single socket deployments where customers still need modern cores, PCIe Gen 5, faster DDR5 support, and server grade memory.



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